(6 pts) The datasheet provides AC timing for a reset sequence: tPOR (power-on reset valid time), tRST_ASRT (reset assertion min), tRST_DSRT (reset de-assertion min). Explain a correct power-on and reset sequencing procedure using these timings. Provide a concise timeline diagram (labels and relative ordering suffice).
If your RTL9210B design isn't working, the datasheet points to three usual suspects:
Integrated switching regulator (5V to 1V) and LDO (5V to 3.3V)
(6 pts) The datasheet provides AC timing for a reset sequence: tPOR (power-on reset valid time), tRST_ASRT (reset assertion min), tRST_DSRT (reset de-assertion min). Explain a correct power-on and reset sequencing procedure using these timings. Provide a concise timeline diagram (labels and relative ordering suffice).
If your RTL9210B design isn't working, the datasheet points to three usual suspects:
Integrated switching regulator (5V to 1V) and LDO (5V to 3.3V)